Apparatus for code tracking in a direct sequence spread spectrum receiver

ABSTRACT

A direct sequence spread spectrum receiver includes correlators for handling prompt, late and early signals. An estimator is used to provide an estimate of the prompt signal and this used in a multiplication process with the late and early signals. The resultant signals are further processed to generate control signals.

BACKGROUND OF THE INVENTION

1. Field of the Invention

This relates to receivers for direct sequence spread spectrum and isconcerned with code tracking part of the receiving apparatus.

2. Description of the Related Art

The normal implementation of a code tracking device for spread spectrumconsists of a so called early prompt late tracking loop and thisinvolves energy detection of the correlated wave form for a correlationthat is performed early, normally half a chip early, and a correlationof energy for a chip that is performed late, normally half a chip late.A timing discrimination curve is then generated by subtracting the earlyfrom the late and this is used to close a feedback loop to adjust thetime, such that the prompt occurs at the correct time.

U.S. Pat. No. 5,402,450 discloses a method and apparatus for estimatingthe magnitude and phase of multipath induced error in the position intime of the peak of a composite autocorrelation function bysynchronising a reference signal to the timing of a received compositesignal is synchronised to a reference signal. Time variations betweenearly and late gate timing points of corrupted and uncorruptedautocorrelation functions are detected by employing scanningcorrelators.

U.S. Pat. No. 5,414,729 discloses a pseudorandom noise ranging receiverwhich compensates for multipath distortion by making use of multiplecorrelator time delay spacing. The receiver consists of a samplingcircuit, multiple carrier and code synchronising circuits and multipledigital correlators. The sampling circuit provides digital samples of areceived composite signal to each of several receiver channel circuits.The synchronising circuits are preferably non-coherent and track anyphase shifts in the received signal and adjust the frequency and phaseof a locally generated carrier reference signal accordingly. Thecorrelators provide signals which are fed to a parameter estimator fromwhich the delay and phase parameters of the direct path signal fromwhich a range measurement can be corrected.

U.S. Pat. No. 5,347,536 discloses a method of multipath noise reductionfor spread spectrum signals in which phase variations among early andprompt lags are detected. Phase and pseudo-range observables are derivedfrom earlier correlation lags and used to generate a multipath-free codecross-correlation shape. Deviations from that shape are used to inferthe magnitude of multipath and to generate corrections for pseudo-rangeobservables. Phase variations from early and prompt lags are used togenerate corrections for carrier-phase observables.

An aim of the invention is to remove the need to have the early and latecorrelations taking place at half a chip but specifically, to enablethem to be applied at plus or minus one chip. This results in particulardifficulties in the normal implementation, in that at plus or minus onechip for a circuit that is operating at the normal timing, thecorrelation falls to zero and therefore energy detection of the signalswill tend to be very noisy and thus a normal implementation would leadto a discrimination curve that is itself very noisy and would lead to avery jittery timing loop.

The apparatus uses spread spectrum signals, which have been Nyquistfiltered and therefore it uses signals, the correlation functions ofwhich still has a good slope on it through the zero points and the basicproblems are solved by not performing energy detection on themeasurements taken or the correlations taken at these intervals butrather, coherently compensating them against a phase reference derivedfrom the prompt signal and thereby reducing the effect of the noise andthus enabling a discrimination signal to be derived which is of asimilar signal to noise ratio as would obtained in the more conventionalplus or minus half a chip early/late situation.

BRIEF SUMMARY OF THE INVENTION

According to one aspect of the present invention, there is providedapparatus for code tracking in a direct sequence spread spectrumreceiver, comprising means for receiving a signal, means for convertingthe received signal into an inphase and quadrature signal, and analogueto digital converter means for converting the inphase and quadraturesignals into digital signals;

characterised in that said apparatus further comprises a firstcorrelator for handling prompt signals, a second correlator for handlinglate signals, a third correlator for handling early signals, estimationmeans for obtaining estimates of the output signals from the firstcorrelator, first and second multiplying and adding means formultiplying the estimates with the output signals from the second andthird correlators respectively and adding the inphase and quadraturechannels together, subtraction means for subtracting the result fromsaid first and second adding means, and control means arranged toreceive the output signals from said subtracting means and generatecontrol signals for the analogue to digital converter means.

According to another aspect of the present invention, there is providedapparatus for code tracking in a direct sequence spread spectrumreceiver, comprising means for receiving a signal, converting means forconverting the received signal into an inphase and quadrature signal,and analogue to digital converter means for converting the inphase andquadrature signals into digital signals;

characterised in that said apparatus farther comprises a firstcorrelator for handling prompt signals, a second correlator for handlinglate signals, a third correlator for handling early signals, a frequencyphase discrimination means for receiving the signals from said firstcorrelator and generating a signal for controlling said converting meansin a manner such that a coherent signal is contained on one signal phasechannel, subtractor means for subtracting the output signals from saidsecond and third correlators and control means connected to saidsubtractor means for controlling said analogue to digital converters.

According to a further aspect of the present invention there is provideda method of acquiring code synchronisation between a received directsequence spread spectrum signal and a locally generated reference codewhich locally generated reference code is representative of a spreadingcode used to spread the spectrum of said received signal, comprising thesteps of:

converting said received signal into inphase and quadrature signalsrepresentative of said received signal,

analogue to digital converting said inphase and quadrature phase signalsinto digital representations, in accordance with a selectivelycontrollable sampling rate,

correlating said digital inphase and said digital quadrature signalswith said reference code in dependence upon a prompt temporal position;

characterised in that said method further comprises the steps of:

further correlating at least one of said digital inphase and saiddigital quadrature phase signals with said reference code in dependenceupon a late temporal position,

further correlating at least one of said digital inphase and saiddigital quadrature phase signals with said reference code in dependenceupon an early temporal position,

forming an error signal in accordance with a difference between saidearly further correlation and said late further correlation, andadjusting said controllable sampling rate in accordance with said errorsignal.

BRIEF DESCRIPTION OF THE DRAWINGS

Various embodiments of the present invention will now be described withreference to the accompanying drawings wherein;

FIG. 1 shows a typical correlation function for the output of acorrelator.

FIG. 2 shows a block diagram of a first embodiment of the invention,and,

FIG. 3 shows a block diagram of a second embodiment of the invention.

DETAILED DESCRIPTION OF THE INVENTION

Referring to FIG. 1 a typical correlation function for the output of acorrelator is shown, indicating the normal nominal positions for theearly, late and prompt correlations, we well as the new proposedpositions for the early and late positions, the prompt positionsobviously being the same.

Referring to FIG. 2, signal input generation means 2 shown as an antennafeeds a frequency converter means 4, which generates I and Q signalswhich feed into a pair of analogue to digital converters 6, 8. Theoutput of these feed into three half complex correlators. The correlatorcomprising units 10, 12, 14, 16 is for the prompt position, thus the Isample signal of the output of the converter 6 is multiplied by theprompt code in the multiplier 10 and is accumulated in the accumulator14, and similarly for multiplier 12, and accumulator 16 for the Qchannel. The outputs for the prompt signal pass on to other circuitryused as familiar to those in art for demodulation purposes. The outputsare also fed to estimation means 18, 20 which essentially in thisembodiment serve as filters to enhance the signal to noise ratio of themeasurement of this position.

Similar operations are performed in the late correlator pair, consistingof multiplier 22 and accumulator 26 for the I channel and multiplier 24and accumulator 28 for the Q channel, however the outputs of these aremultiplied by the estimates derived from the prompt channel inmultipliers 30, 32 and added together in the adder 34.

Similarly, for the early channel similar operations are performed by themultiplier 36 and the accumulator 40, the multiplier 38 and accumulator42. The output from the accumulators 40, 42 are also multiplied by theestimates by the multiples 44, 46, the outputs of which are added by theadder 48. The outputs of the adders 34, 48 are then subtracted insubtracting means 50. It will be appreciated that these operations canbe performed in a different order and in fact two multipliers can besaved if the subtractions are performed prior to the multiplicationshowever, this embodiment better explains the principle.

The output of subtractor means 50 is fed to loop filter means 52 andused to control a clock generator 54 for the sampling of the converters6, 8 in order to advance or retard the timing of the sampling in such away to cause the prompt signal to coincide with correlation at the peakof the correlation function. It will be appreciated that additionalembodiments of this invention are possible, for example, the samplingmay initially take place at a higher rate than one sample per chip andthe generation of samples at one sample per chip may be formed throughinterpolator means and the timings of the samples generated through theinterpolator means can be established through setting up the correctinterpolator coefficients and the selection of these can also becontrolled from the output of the filter means 52. It will also beappreciated that under some circumstances there may be an improvement ifthe outputs of estimates 18, 20 are so controlled as to normalise themso that they are constant amplitude and that they embody only the phaseinformation of that estimate.

A local code generator 56 controls the multipliers 10, 12, 22, 24, 36,38 by way of the circuit 58 which generates the early/late/promptsignal.

A further implementation is shown in FIG. 3. Referring to FIG. 3 thesignal generation means 60 is an antenna. A frequency converter 62 feedsthe I and Q channels via analogue to digital converters 64, 66. Asbefore, the multiplier 68 and accumulator 72 together form a correlatorand similarly the multiplier 70 and the accumulator 74 form a furthercorrelator. The outputs from the correlators feed into frequency phasediscrimination means 76 which generates a frequency control signal inthe manner familiar to those versed in the art which feeds back to thefrequency converter 62 to control the phase of the conversion in such away that the coherent signal is all contained on the I channel. In thisway, for the early and the late signals, it becomes unnecessary tocorrelate on the Q channel and thus, a single multiplier 78 and singleaccumulator 80 only is provided which generates the early signal, andsimilarly for the late signal a multiplier 82 and an accumulator 84 onlyis provided. The outputs from the accumulators 80, 84 are subtracted insubtraction means 86, which feeds the loop filter 88 for controlling theclock generator means 90.

A local code generator 92 generates early/late/prompt signals by way ofthe circuit 94 for controlling the multipliers 68, 70, 78, 82.

It will be readily appreciated by those skilled in the art thatalternative arrangements fully within the scope of the invention. Forexample, connection to the frequency converters may be made via cables.

What is claimed is:
 1. Apparatus for code tracking in a direct sequencespread spectrum receiver, comprising means for receiving a signal, meansfor converting the received sign into an inphase and quadrature signal,and analogue to digital converter means for converting the inphase andquadrature signals into digital signals; characterized in that saidapparatus further comprises a first correlator for handling promptsignals, a second correlator for handling late signals, a thirdcorrelator for handling early signals, estimation means for obtainingestimates of the output signals from the first correlator, first andsecond multiplying and adding means for multiplying the estimates withthe output signals from the second and third correlators respectivelyand adding the inphase and quadrature channels together, subtractionmeans for subtracting the result from said first and second addingmeans, and control means arranged to receive the output signals fromsaid subtracting means and generate control signals for the analogue todigital converter means.
 2. Apparatus as claimed in claim 1, whereineach correlator comprises a multiplier and an accumulator andaccumulator for handling the quadrature signal.
 3. Apparatus as claimedin claim 1, wherein the control means comprises a loop filter and clockgenerator.
 4. Apparatus as claimed in claim 2, wherein the multipliersin each correlator are controlled by a code generator and means forgenerating early/late/prompt signal codes.
 5. Apparatus for codetracking in a direct sequence spread spectrum receiver, comprising meansfor receiving a signal, converting means for converting the receivedsignal into an inphase and quadrature signal, and analogue to digitalconverter means for converting the inphase and quadrature signals intodigital signals; characterized in that said apparatus further comprisesa first correlator for handling prompt signals, a second correlator forhandling late signals, a third correlator for handling early signals, afrequency phase discrimination means for receiving the signals from saidfirst correlator and generating a signal for controlling said convertingmeans in a manner such that a coherent signal is contained on one signalphase channel, subtractor means for subtracting the output signals fromsaid second and third correlators and control means connected to saidsubtractor means for controlling said analogue to digital converters. 6.Apparatus as claimed in claim 5, wherein the first correlator comprisesa multiplier and accumulator for each signal channel.
 7. Apparatus asclaimed in claim 6, wherein the second and third correlators comprise amultiplier and accumulator for each signal channel.
 8. Apparatus asclaimed in claim 5, wherein the control means comprises a loop filterand clock generator.
 9. Apparatus as claimed in claim 7, wherein themultipliers in each correlator are controlled by a code generator andmeans for generating early/late/prompt signals.
 10. A method ofacquiring code synchronisation between a received direct sequence spreadspectrum signal and a locally generated reference code which locallygenerated reference code is representative of a spreading code used tospread the spectrum of said received signal, comprising the steps of:converting said received signal into inphase and quadrature signalsrepresentative of said received signal, analogue to digital convertingsaid inphase and quadrature phase signals into digital representations,in accordance with a selectively controllable sampling rate, correlatingsaid digital inphase and said digital quadrature signals with saidreference code in dependence upon a prompt temporal position;characterised in that said method further comprises the steps of:further correlating at least one of said digital inphase and saiddigital quadrature phase signals with said reference code in dependenceupon a late temporal position, further correlating at least one of saiddigital inphase and said digital quadrature phase signals with saidreference code in dependence upon an early temporal position, forming anerror signal in accordance with a difference between said early furthercorrelation and said late further correlation, and adjusting saidcontrollable sampling rate in accordance with said error signal. 11.Apparatus as claimed in claim 2, wherein the control means comprises aloop filter and clock generator.
 12. Apparatus as claimed in claim 3,wherein the multipliers in each correlator are controlled by a codegenerator and means for generating early/late/prompt signal codes. 13.Apparatus as claimed in claim 6, wherein the control means comprises aloop filter and clock generator.
 14. Apparatus as claimed in claim 7,wherein the control means comprises a loop filter and clock generator.15. Apparatus as claimed in claim 8, wherein, the multipliers in eachcorrelator are controlled by a code generator and means for generatingearly/late/prompt signals.